ABE-IPSABE HOLDINGABE BOOKS
English Polski
Dostęp on-line

Książki

0.00 PLN
Schowek (0) 
Schowek jest pusty
Processor Architecture

Processor Architecture

Autorzy
Wydawnictwo Springer Nature
Data wydania 06/12/2012
Forma publikacji eBook: Fixed Page eTextbook (PDF)
Język angielski
ISBN 9783642585890
Kategorie Architektura, Computer architecture & logic design
Produkt dostępny on-line
Typ przesyłki: wysyłka kodu na adres e-mail
E-Mail
zamówienie z obowiązkiem zapłaty
Do schowka

Opis książki

Today's microprocessors are the powerful descendants of the von Neumann 1 computer dating back to a memo of Burks, Goldstine, and von Neumann of 1946. The so-called von Neumann architecture is characterized by a se­ quential control flow resulting in a sequential instruction stream. A program counter addresses the next instruction if the preceding instruction is not a control instruction such as, e. g. , jump, branch, subprogram call or return. An instruction is coded in an instruction format of fixed or variable length, where the opcode is followed by one or more operands that can be data, addresses of data, or the address of an instruction in the case of a control instruction. The opcode defines the types of operands. Code and data are stored in a common storage that is linear, addressed in units of memory words (bytes, words, etc. ). The overwhelming design criterion of the von Neumann computer was the minimization of hardware and especially of storage. The most simple implementation of a von Neumann computer is characterized by a microar­ chitecture that defines a closely coupled control and arithmetic logic unit (ALU), a storage unit, and an I/O unit, all connected by a single connection unit. The instruction fetch by the control unit alternates with operand fetches and result stores for the AL U.

Processor Architecture

Polecamy również książki

Strony www Białystok Warszawa
801 777 223